**About Us**
We are a tech company specializing in the design and development of cutting-edge, customized server hardware solutions optimized for artificial intelligence and machine learning applications. Our mission is to empower businesses and researchers to accelerate their AI initiatives by providing them with high-performance, scalable, and energy-efficient hardware infrastructure.
As a rapidly growing company at the forefront of AI hardware innovation, we are constantly seeking talented and motivated individuals to join our team. We offer a dynamic and challenging work environment, with opportunities to make a significant impact on the future of AI technology.
You'll Collaborate With
Firmware, silicon, runtime, datacenter software and architects teams to deliver a robust kernel foundation that integrates seamlessly with modern datacenter environments and AI workloads.
What You'll Own
- PCIe Foundation: Design and implement robust PCIe kernel drivers for AI accelerator enumeration, configuration, and management that form the critical host-device communication backbone.
- High-Speed Data Movement: Develop DMA engines and memory management systems that deliver zero-copy, high-throughput data movement between host and accelerator for massive AI workloads.
- Firmware Bridge: Build interrupt handling (MSI/MSI-X) and mailbox communication protocols that create seamless coordination between kernel space and our firmware stack.
- System Observability: Create comprehensive sysfs/debugfs interfaces for device configuration, telemetry, and diagnostics that give operators deep visibility into accelerator operations.
- Multi-Die Orchestration: Support multi-die topologies through device discovery, link management, and topology coordination that scales from single-card to cluster deployments.
- Power & Thermal Intelligence: Develop power management and thermal control integration with Linux PM frameworks that optimize performance while maintaining reliability.
- Reliability Engineering: Contribute to device health monitoring, error handling (RAS), and recovery mechanisms that deliver the 99.99% uptime datacenter customers require.
- Performance Optimization: Optimize kernel-space performance for AI workloads, focusing on latency, throughput, and scalability that directly impacts model training and inference speed.
- Time Synchronization: Support PTP/PHC time synchronization for distributed training and inference that ensures coordination across multi-node AI clusters.
- Runtime Partnership: Collaborate with userspace runtime teams on kernel-userspace interfaces and APIs that enable efficient scheduling and resource sharing.
- Future-Ready Architecture: Lay the groundwork for device virtualization and multi-tenant isolation, ensuring our platform can evolve with customer needs.
**Minimum Qualifications**
- 5+ years developing Linux kernel drivers and subsystems in C for complex SoCs or accelerators
- Proven experience with PCIe device driver development (enumeration, BARs, DMA, interrupts)
- Strong knowledge of Linux memory management, DMA mapping, and IOMMU integration
- Hands-on experience with kernel synchronization primitives, workqueues, and interrupt handling
- Solid understanding of Linux device model, sysfs/debugfs, and driver lifecycle management
- Familiarity with kernel debugging tools: ftrace, perf, crash, kprobes, and hardware debuggers
- Ability to read hardware specifications and work with RTL/hardware teams on register interfaces
- Excellent documentation habits; comfortable with kernel development processes and upstream contribution
**Preferred Qualifications**
- Experience with AI/ML accelerator drivers or GPU compute drivers (NVIDIA, AMD, Intel)
- Implemented RDMA/RoCE drivers or high-speed networking kernel subsystems
- Background in PTP/PHC time synchronization or distributed system timing
- Multi-die/chiplet device driver experience and topology management
- Linux kernel upstream contributions and familiarity with kernel community processes
- Experience with kernel security features, SELinux integration, and device isolation
- Knowledge of container/runtime integration with kernel drivers (Docker, Kubernetes)
- Performance optimization experience for high-throughput, low-latency kernel subsystems
- Familiarity with RAS concepts, ECC handling, and system reliability in kernel space
What Success Looks Like (First 6–9 Months)
- PCIe driver is stable and reliable across multiple system configurations and stress tests
- DMA and memory management achieve target throughput with low CPU overhead
- Multi-die topology management and inter-card communication is functional and performant
- Integration with firmware mailbox protocols and telemetry collection is operational
- Performance benchmarks meet targets for key AI workloads (inference and training)
- Documentation and test coverage enable team-wide development and deployment
**Ready to accelerate the future of AI from the firmware up?**
Submit your application with links to relevant firmware projects, papers, or upstream contributions demonstrating secure boot, update/recovery, PCIe bring-up, or runtime management. Show us how you think systematically about firmware architecture and what you've built that scales.
*Join us in our mission to democratize AI compute — where your firmware expertise becomes the bedrock of tomorrow's AI breakthroughs.*
**About Us**
We are a tech company specializing in the design and development of cutting-edge, customized server hardware solutions optimized for artificial intelligence and machine learning applications. Our mission is to empower businesses and researchers to accelerate their AI initiatives by providing them with high-performance, scalable, and energy-efficient hardware infrastructure.
As a rapidly growing company at the forefront of AI hardware innovation, we are constantly seeking talented and motivated individuals to join our team. We offer a dynamic and challenging work environment, with opportunities to make a significant impact on the future of AI technology.
You'll Collaborate With
Firmware, silicon, runtime, datacenter software and architects teams to deliver a robust kernel foundation that integrates seamlessly with modern datacenter environments and AI workloads.
What You'll Own
- PCIe Foundation: Design and implement robust PCIe kernel drivers for AI accelerator enumeration, configuration, and management that form the critical host-device communication backbone.
- High-Speed Data Movement: Develop DMA engines and memory management systems that deliver zero-copy, high-throughput data movement between host and accelerator for massive AI workloads.
- Firmware Bridge: Build interrupt handling (MSI/MSI-X) and mailbox communication protocols that create seamless coordination between kernel space and our firmware stack.
- System Observability: Create comprehensive sysfs/debugfs interfaces for device configuration, telemetry, and diagnostics that give operators deep visibility into accelerator operations.
- Multi-Die Orchestration: Support multi-die topologies through device discovery, link management, and topology coordination that scales from single-card to cluster deployments.
- Power & Thermal Intelligence: Develop power management and thermal control integration with Linux PM frameworks that optimize performance while maintaining reliability.
- Reliability Engineering: Contribute to device health monitoring, error handling (RAS), and recovery mechanisms that deliver the 99.99% uptime datacenter customers require.
- Performance Optimization: Optimize kernel-space performance for AI workloads, focusing on latency, throughput, and scalability that directly impacts model training and inference speed.
- Time Synchronization: Support PTP/PHC time synchronization for distributed training and inference that ensures coordination across multi-node AI clusters.
- Runtime Partnership: Collaborate with userspace runtime teams on kernel-userspace interfaces and APIs that enable efficient scheduling and resource sharing.
- Future-Ready Architecture: Lay the groundwork for device virtualization and multi-tenant isolation, ensuring our platform can evolve with customer needs.
**Minimum Qualifications**
- 5+ years developing Linux kernel drivers and subsystems in C for complex SoCs or accelerators
- Proven experience with PCIe device driver development (enumeration, BARs, DMA, interrupts)
- Strong knowledge of Linux memory management, DMA mapping, and IOMMU integration
- Hands-on experience with kernel synchronization primitives, workqueues, and interrupt handling
- Solid understanding of Linux device model, sysfs/debugfs, and driver lifecycle management
- Familiarity with kernel debugging tools: ftrace, perf, crash, kprobes, and hardware debuggers
- Ability to read hardware specifications and work with RTL/hardware teams on register interfaces
- Excellent documentation habits; comfortable with kernel development processes and upstream contribution
**Preferred Qualifications**
- Experience with AI/ML accelerator drivers or GPU compute drivers (NVIDIA, AMD, Intel)
- Implemented RDMA/RoCE drivers or high-speed networking kernel subsystems
- Background in PTP/PHC time synchronization or distributed system timing
- Multi-die/chiplet device driver experience and topology management
- Linux kernel upstream contributions and familiarity with kernel community processes
- Experience with kernel security features, SELinux integration, and device isolation
- Knowledge of container/runtime integration with kernel drivers (Docker, Kubernetes)
- Performance optimization experience for high-throughput, low-latency kernel subsystems
- Familiarity with RAS concepts, ECC handling, and system reliability in kernel space
What Success Looks Like (First 6–9 Months)
- PCIe driver is stable and reliable across multiple system configurations and stress tests
- DMA and memory management achieve target throughput with low CPU overhead
- Multi-die topology management and inter-card communication is functional and performant
- Integration with firmware mailbox protocols and telemetry collection is operational
- Performance benchmarks meet targets for key AI workloads (inference and training)
- Documentation and test coverage enable team-wide development and deployment
**Ready to accelerate the future of AI from the firmware up?**
Submit your application with links to relevant firmware projects, papers, or upstream contributions demonstrating secure boot, update/recovery, PCIe bring-up, or runtime management. Show us how you think systematically about firmware architecture and what you've built that scales.
*Join us in our mission to democratize AI compute — where your firmware expertise becomes the bedrock of tomorrow's AI breakthroughs.*
